A liquid crystal display device nowadays has characteristics such as small size, thinness, low power consumption, and light weight, and is widely used in various kinds of electronic devices. Particularly, an active matrix type liquid crystal display device (liquid crystal panel) having a switching element as an active element can realize the same display property as in a CRT, so that this is widely applied to an OA device such as a personal computer, an AV device such as a television, a cellular phone, and the like. Further, recently, the liquid crystal display device has been being made larger and finer, and its quality (such as an effective pixel area ratio (aperture ratio)) has improved rapidly.
In a technique wherein a pixel electrode and a source line (signal line) are formed in the same surface of an active matrix substrate, a distance between the pixel and a source bus line (hereinafter, referred to simply as a source line) is shortened and the source line is made finer so as to increase the effective pixel area, thereby making the device finer and improving the aperture ratio.
However, when the distance between the pixel and the source line is shortened, a short circuit tends to occur. Further, when the source line is made finer, connection failure tends to occur. In such a technique wherein a pixel electrode and a source line are formed in the same surface of an active matrix substrate, the tendency to short circuiting and connection failure decrease production yield.
To prevent short circuiting and the connection failure, and resultant production yield, methods (a) to (c) of manufacturing the active matrix substrate have been proposed.
(a) After forming the active element and the source line, a transparent interlayer insulating film is provided.
(b) The active element and a transparent pixel electrode are made to contact each other via a contact hole.
(c) A pixel electrode is formed on the transparent interlayer insulating film so that the source line and the pixel electrode are separately positioned on different planes.
Further, a color filter substrate is combined with the active matrix substrate manufactured in the foregoing manner so that the color filter substrate faces the active matrix substrate, and liquid crystal is injected into a gap between both the substrates, thereby obtaining the liquid crystal display device. An example color filter substrate includes a color substrate having areas of R (red), G (green), and B (blue), so that these areas correspond to pixel areas on the side of the active matrix substrate wherein a black matrix (light shielding film) is provided on an area other than the pixel areas.
In the manufacturing method of the liquid crystal display device using the foregoing color filter, accuracy in forming the black matrix (hereinafter, referred to as “BM” as required) has influence on the aperture ratio. The accuracy in forming the BM is calculated by adding (i) accuracy in combining the active matrix substrate with the color filter substrate to (ii) accuracy in forming a desired width of the BM. In order to solve the problem, Japanese Unexamined Patent Publication No. 170957/1998 (Tokukaihei 10-170905) (publication date: Jun. 26, 1998) and Japanese Unexamined Patent Publication No. 33816/2001 (Tokukai 2001-33816) (Publication date: Feb. 9, 2001) recite such technique that the BM is formed on the side of the active matrix substrate in a self-aligning manner so as to improve the aperture ratio.
The following description will explain a specific example of the active matrix substrate, on which the BM is formed in a self-aligning manner, with reference to FIG. 12 and FIG. 13.
FIG. 12 is a plan view showing a pixel of a conventional active matrix substrate (thin film transistor array) and a part of a pixel adjacent to that pixel. As shown in FIG. 12, a gate bus line (scanning line: hereinafter, referred to merely as a gate line) 101 and a source bus line (signal line: hereinafter, referred to merely as a source line) 102 are disposed so as to cross each other in the pixel of the conventional active matrix substrate. In the intersection area, a pixel electrode 103 is disposed.
On the gate line 101, a gate electrode 104 is provided. On the source line 102, a source electrode 105 is provided. Further, the pixel electrode 103 is connected to the drain electrode 106. Further, a pixel electrode 103′ having the same function as the pixel electrode 103 is provided on a pixel adjacent to the pixel having the pixel electrode 103. The source line 102 is provided between the pixel electrode 103 and the pixel electrode 103′.
A drain electrode 106 is connected to the pixel electrode 103 via a contact hole 109. Likewise, an auxiliary capacitor bus line (hereinafter, referred to merely as an auxiliary capacitor line) 107 is connected to the pixel electrode 103 via a contact hole 109′.
The following description will briefly explain a method of manufacturing the active matrix substrate, particularly a method of manufacturing a thin film transistor array, with reference to FIG. 12 and FIG. 13. Note that, FIG. 13 is a cross sectional view taken along A-A′ line of the thin film transistor array shown in FIG. 12.
First, the gate line 101, the gate electrode 104, and the auxiliary capacitor line 107 are formed on a substrate 110, constituted of a transparent insulating substrate made of glass and the like, in accordance with the same process. Next, a gate insulating film 111 is formed thereon.
Thereafter, an active element 114 such as a thin film transistor (TFT) is formed. In FIG. 12 and FIG. 13, first, an active semiconductor layer 112 is formed. Next, an amorphous silicon (for example, an n-type amorphous silicon) layer 113 is formed. Further, the source line 102, the source electrode 105, and the drain electrode 106 are formed (the source line 102 and the source electrode 105 are formed in accordance with the same process).
Next, the BM 108 constituted of an insulating layer pattern is formed so as to cover the active element 114 (except for the contact hole 109 and its peripheral portion), the source line 102, and the gate line 101, and the auxiliary capacitor line 107 (except for the contact hole 109′ and its peripheral portion).
The black matrix 108 is provided on areas of the components other than the pixel electrode in a self-aligning manner. The BM 108 is formed in a self-aligning manner so as to correspond to the gate line 101, the source line 102, the active element 114, and the auxiliary capacitor line 107, by exposing a back side of the substrate 110.
Thereafter, the interlayer insulating film 115 is formed so as to cover whole the surface. Next, the contact hole 109 and the contact hole 109′ are formed. Next, the pixel electrodes 103 and 103′ are formed so as to coat the contact holes 109 and 109′. Note that, the contact hole 109 enables the drain electrode 106 and the pixel electrode 103 of the active element to be connected to each other. Further, the contact hole 109′ enables the auxiliary capacitor line 107 for generating auxiliary capacitance and the pixel electrode 103 to be connected to each other.
According to the manufacturing method, in the active matrix substrate, it is possible to separate the source line 102 from the pixel electrode 103 with the interlayer insulating film 115 therebetween.
By separating the source line from the pixel electrode, it is possible to make the pixel electrode (103/103′) and the source line 102 overlap with each other as shown in FIG. 13. In a conventional technique, the aperture ratio of the liquid crystal display device is improved by (i) making the pixel electrode and the source line overlap with each other and (ii) forming the minimum BM pattern in a self-aligning manner.
How the pixel electrode and the source line overlap with each other is described as follows with reference to FIG. 13. Each of (z) and (z′) that are shown in FIG. 12 and FIG. 13 represents a distance of a portion in which the source line 102 overlaps with the pixel electrode 103 or 103′. Further, in FIG. 13, z is a distance between z1 and z2. Likewise, z′ is a distance between z1′ and z2′.
The z1 represents where an end of the source line 102 is positioned, and is a line which extends from the end of the source line 102 in perpendicular to a surface of the source line 102. Likewise, the z1′ represents where an end of the source line 102 is positioned, and is a line which extends from the end of the source line 102 in perpendicular to a surface of the source line 102. Z1 is an end close to a pixel electrode (103′) adjacent to a target pixel. The z1′ is an end close to a pixel electrode (103) of the target pixel.
z2 represents where an end of the pixel electrode 103′ is positioned, and is a line which extends from the end of the pixel electrode 103′ in perpendicular to a surface of the pixel electrode 103′. Likewise, z2′ represents where an end of the pixel electrode 103 is positioned, and is a line which extends from the end of the pixel electrode 103 in perpendicular to a surface of the pixel electrode 103.
However, according to the manufacturing method of the substrate, parasitic capacitance (Csd) between the pixel electrode and the source line varies in a display area. The variation brings about an in-plane difference in electric charge retained in a liquid crystal capacitor of each pixel. The in-plane difference causes display unevenness of the liquid crystal display device.
Such problem results from such condition that: unevenness in the exposure accuracy is brought about in a photolithograph process, and the unevenness causes a positional relationship between the source line pattern and the pixel electrode pattern to vary in the display area. In manufacturing the active matrix, alignment accuracy between a light-emitted portion and a light-non-emitted portion in the lithography process is generally about ±0.3 μm.